High power output stages of electronic systems may source or sink high currents and generate a large amount of heat as a by-product. A variety of different techniques have been employed to keep the operating temperature of electronic devices within an acceptable range. For example, some systems may use heat sinks on the power components or may supply additional air flow in an effort to decrease the temperature. If the power component exceeds its acceptable operating range the power component may become thermally overstressed, a situation that may lead to significant premature failures or, in some cases, an immediate failure.
Generally, before an electronic device (e.g., an integrated circuit (IC)) is deemed satisfactory, the device is subjected to substantial testing. In some cases, this testing may involve the injection of a voltage or current into the device under test followed by various measurements. For example, an automated test system may be used, which may incorporate a VI (voltage, current) instrument to force a voltage or current into the DUT. Typically, an automated testing system will operate in one of two modes, continuous or pulsed.
In the continuous mode, the automated testing system may be configured to provide a specific current for an indefinite period of time. For example, the automated testing system may be programmed to provide 1.5 Amperes (A) continuously, while still operating within the acceptable temperature range of the output stage. In some cases, pre-loaded tables stored within the automated testing system may set the safe operating conditions and limit the output to an acceptable level.
In the pulsed mode, the amount of heat generated by the output stage of the VI instrument is a function of the on and off times of the output stage. The longer the on time, the higher the temperature of the output stage. For example, a 5.0 A pulse could be applied for a 20% on time (On=20 ms/Off=80 ms) and the temperature of the output stage may be maintained within the acceptable operational range.
In the testing environment, the duration of a particular test is often an important consideration. As programmers of automated test systems strive to reduce device test time, the output power and on and off times of the VI instrument must be observed to ensure that the output stage is not stressed beyond its thermal limit.
Traditionally, one method used to monitor the temperature of the output stage of the VI instrument involved the use of thermocouples and/or thermistors to measure the actual temperature of the instrument. However, this approach has not always yielded sufficiently accurate results as the generated heat has a thermal lag and will continue to rise even when the VI instrument is turned off to cool. This may lead to excessive temperature.
One approach that has been used to approximate output stage temperature may utilize a counter to keep track of the time that the output stage is enabled. In this example, the counter may increment whenever the gate for the output stage is enabled (i.e., Gate On) and may automatically disable the output stage (i.e., Gate Off) if the count is exceeded. In this case, the output stage may be turned off to allow for cooling and in some cases ruin the test being performed.
To prevent an over temperature condition, the VI instrument may be programmed to stay within the specified on time for the current being applied and implement forced waits to allow for cooling of the output device. For example, a 1 A pulse may be applied for an on time of 20 ms with an off time of 80 ms yielding a 20% on time. Repeating this test 10 times would take approximately 1000 ms of test time.
This approach may yield an inaccurate approximation of the VI instrument temperature as the counter may begin incrementing whenever the gate for the output stage is turned on, regardless of whether the load was drawing any power. The VI instruments used in automatic test equipment are often used as loads for the DUT and may not draw power continuously during the test. This may produce a false thermal approximation since the output stage only heats up when current is being drawn.
Further, this approach may lead to inefficient test programs requiring longer test times. That is, forced wait states may need to be implemented to allow for cooling in order to maintain a maximum on time percentage (i.e., 20%) without accounting for the actual current drawn. Moreover, reaching the counter limit may force a Gate Off condition that removes power from the DUT and invalidates the electrical verification process.
As such, existing testing methodologies provide an over conservative estimation of the thermal profile of the output stage of a VI instrument. A system configured to make a more accurate approximation of output stage temperature and produce a longer on time, which may reduce the total amount of test time required.